AlcapDAQ  1
dl40x.h
Go to the documentation of this file.
1 /*----------------------------------------------------------------------------
2  $Id: dl40x.h,v 1.1 2004/09/22 10:36:51 mucap Exp $
3  STRUCK DL40x modules interface
4  T.Gorringe/P.Zolnierczuk (University of Kentucky)
5 
6  $Log: dl40x.h,v $
7  Revision 1.1 2004/09/22 10:36:51 mucap
8  First commit of crate program for fall 2004 run. It currently supports
9  all modules in the two 6U VME crates (CAEN V767 TDC, SIS FIFO, DL40x flash
10  ADCs) and the CAMAC modules that will be in the fast readout.
11 
12  Revision 1.2 2003/05/29 17:30:08 mucap
13  Changed FADC readout to start at the "oldest" sample rather than the
14  first byte of the buffer.
15 
16  Revision 1.1 2003/05/01 08:28:50 mucap
17 
18  FADC integration is now complete. Piotr's old FADC code is now employed by
19  crate3.cpp in order to operate the FADCs.
20 
21  Revision 1.4 2001/12/18 21:04:07 zolnie
22  polishing the code
23 
24  Revision 1.3 2001/12/03 17:59:17 zolnie
25  dma working now
26 
27  Revision 1.2 2001/11/26 02:48:47 zolnie
28  more primitive daq SHISHSTEM
29 
30  Revision 1.1.1.1 2001/11/25 23:36:57 zolnie
31  Imported sources
32 
33  Revision 1.7 2001/11/24 23:28:04 zolnie
34  *** empty log message ***
35 
36  Revision 1.4 2001/10/19 17:31:48 zolnie
37  working version (dl401/dl403)
38 
39  Revision 1.3 2001/10/04 23:50:06 zolnie
40  further improvements
41 
42  Revision 1.2 2001/10/04 19:52:04 zolnie
43  some progress
44 
45  ---------------------------------------------------------------------------*/
46 #ifndef STRUCK_DL40X_H
47 #define STRUCK_DL40X_H
48 
49 /* ==================== STRUCK DL401 VME FLASH ADC ========================*/
50 #define DL401_MAXMODULES 16
51 
52 #define DL401_NCHAN 4 /* number of inputs per module */
53 #define DL401_PEDCHANBITS 6
54 #define DL401_PEDCHANMASK 0x3F /* pedestal mask (one chan) */
55 #define DL401_PEDBITMASK 0x00800000 /* pedestal bit mask */
56 #define DL401_PEDBITS 24
57 #define DL401_PEDMASK 0x00FFFFFF /* pedestal mask */
58 #define DL401_CNTMASK 0x03FF
59 #define DL401_CNTMAX 0x0400
60 
61 /* --------------- 16 bit word access --------------------- */
62 #define DL401_ICNV 0x02 /* Internal CoNVert (D0) (R) */
63 #define DL401_CLIF 0x02 /* Clear Interrupt Flag (W) */
64 #define DL401_WDAC 0x12 /* Write serial DAC data (W) */
65 #define DL401_MRST 0x22 /* Module ReSeT (W) */
66 #define DL401_BASE 0x52 /* load BASE address (0x00) (W) */
67 #define DL401_MASK 0x62 /* MASK word (see below) (W) */
68 #define DL401_MODE 0x72 /* MODE word (see below) (R/W) */
69 #define DL401_RMAD 0x90 /* Read Memory ADdres counter (R) */
70 
71 
72 /* --------------- DL401 MASK (0x50/0x52) BITS ------------- */
73 #define DL401_SMODSIZ 0x000f /* load SubMODule SIZe (==0) */
74 #define DL401_ADDRMOD 0x3f00 /* load ADDress MODifier */
75 #define DL401_ADDRMSH 8 /* ADDress Modifier SHift */
76 #define VME_AM_EXT_USR_DATA 0x09
77 #define DL401_AM_EXT_MODE (VME_AM_EXT_USR_DATA << DL401_ADDRMSH)
78 #define DL401_AM_STD_MODE (VME_AM_STD_USR_DATA << DL401_ADDRMSH)
79 #define DL401_LWIOENA 0x8000 /* Long Word I/O ENAble */
80 
81 /* --------------- DL401 MODE (0x70/0x72) BITS ------------- */
82 #define DL401_IRQVEC 0x00ff /* Interrupt VECtor (R/W) */
83 #define DL401_IRQPRI 0x0700 /* Interrupt PRIority (R/W) */
84 #define DL401_IRQMOD 0x0800 /* Interrupt MODe (R/W) */
85 
86 #define DL401_DEFMODE 0x0000 /* DEFault MODe (W) */
87 #define DL401_INTMODE 0x1000 /* INTernal MODe (W) */
88 #define DL401_EXTMODE 0xefff /* EXTernal MODe (W) */
89 #define DL401_INTGATE 0x2000 /* internal gate (W) */
90 #define DL401_EXTGATE 0xdfff /* external gate (W) */
91 #define DL401_DACWDIS 0x4000 /* DAC Write DISable (W) */
92 #define DL401_DACWENA 0xbfff /* DAC Write ENAble (W) */
93 #define DL401_AUTOMODE 0x8000 /* AUTOstop MODE enable (W) */
94 #define DL401_CONTMODE 0x7fff /* CONTinuous MODE enable (W) */
95 
96 #define DL401_ASTOPACT 0x1000 /* :0 auto stop active */
97 #define DL401_INTREQ 0x2000 /* :1 internal interrupt request*/
98 #define DL401_RDAC 0x4000 /* Read serial DAQ output */
99 
100 
101 
102 /* ==================== STRUCK DL403 VME 100MHz CLOCK =====================*/
103 #define DL403_MAXMODULES 4
104 #define DL403_CYCLESNUM 3
105 
106 /* DL403 register offsets */
107 #define DL403_CYCLE1 0x02
108 #define DL403_CYCLE2 0x04
109 #define DL403_CYCLE3 0x06
110 #define DL403_RATE 0x08
111 #define DL403_START 0x0a
112 #define DL403_STOP 0x0c
113 #define DL403_MODE 0x72
114 #define DL403_RESET 0x22
115 
116 /* DL403 clock defines */
117 #define DL403_EXTERN 0x00
118 #define DL403_SELECTED 0x01
119 #define DL403_50MHZ 0x02
120 #define DL403_100MHZ 0x03
121 
122 /* DL403 modes */
123 #define DL403_ASYNC 0x1000
124 #define DL403_CONT 0x2000
125 #define DL403_STEADY 0x4000
126 
127 #define DL403_RUN 0x1000
128 #define DL403_RUNSHFT 12
129 
130 #define DL403_GO 0xffff /* used for start/stop commands */
131 
132 INT dl401_init (struct dl401 *d);
133 void dl401_teardown ();
134 INLINE void dl401_setup (struct dl401 * d, u_short bs, u_short am, u_short md);
135 INLINE int dl401_setPedestals(struct dl401 * d, u_short p[], int np);
136 INLINE u_long dl401_getPedestals(struct dl401 * d);
137 INLINE u_short dl401_getCounts (struct dl401 * d);
138 INLINE u_short dl401_getMode (struct dl401 * d);
139 INLINE u_short dl401_getMask (struct dl401 * d);
140 INLINE void dl401_clear (struct dl401 * d);
141 INLINE void dl401_reset (struct dl401 * d);
142 INLINE void dl401_convert (struct dl401 * d);
143 INLINE int dl401_finished (struct dl401 * d);
144 INLINE int dl401_read (struct dl401 * d, u_int *data);
145 INLINE int dl401_dmaread (struct dl401 * d, u_int *data);
146 
147 INT dl403_init (struct dl403 *d);
148 
149 void dl403_setClockRate (struct dl403 * d, u_short clk1, u_short clk2, u_short clk3);
150 void dl403_setClockCycle(struct dl403 * d, u_short cyc1, u_short cyc2, u_short cyc3);
151 INLINE void dl403_asyncMode (struct dl403 * d);
152 INLINE void dl403_contMode (struct dl403 * d);
153 INLINE void dl403_steadyMode (struct dl403 * d);
154 INLINE short dl403_runBit (struct dl403 * d);
155 INLINE void dl403_start (struct dl403 * d);
156 INLINE void dl403_stop (struct dl403 * d);
157 INLINE void dl403_reset (struct dl403 * d);
158 INLINE short dl403_running (struct dl403 * d);
159 
160 
161 #endif
Generated by   doxygen 1.8.4