AlcapDAQ  1
Macros | Functions
dl40x.h File Reference

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Macros

#define DL401_MAXMODULES   16
 
#define DL401_NCHAN   4 /* number of inputs per module */
 
#define DL401_PEDCHANBITS   6
 
#define DL401_PEDCHANMASK   0x3F /* pedestal mask (one chan) */
 
#define DL401_PEDBITMASK   0x00800000 /* pedestal bit mask */
 
#define DL401_PEDBITS   24
 
#define DL401_PEDMASK   0x00FFFFFF /* pedestal mask */
 
#define DL401_CNTMASK   0x03FF
 
#define DL401_CNTMAX   0x0400
 
#define DL401_ICNV   0x02 /* Internal CoNVert (D0) (R) */
 
#define DL401_CLIF   0x02 /* Clear Interrupt Flag (W) */
 
#define DL401_WDAC   0x12 /* Write serial DAC data (W) */
 
#define DL401_MRST   0x22 /* Module ReSeT (W) */
 
#define DL401_BASE   0x52 /* load BASE address (0x00) (W) */
 
#define DL401_MASK   0x62 /* MASK word (see below) (W) */
 
#define DL401_MODE   0x72 /* MODE word (see below) (R/W) */
 
#define DL401_RMAD   0x90 /* Read Memory ADdres counter (R) */
 
#define DL401_SMODSIZ   0x000f /* load SubMODule SIZe (==0) */
 
#define DL401_ADDRMOD   0x3f00 /* load ADDress MODifier */
 
#define DL401_ADDRMSH   8 /* ADDress Modifier SHift */
 
#define VME_AM_EXT_USR_DATA   0x09
 
#define DL401_AM_EXT_MODE   (VME_AM_EXT_USR_DATA << DL401_ADDRMSH)
 
#define DL401_AM_STD_MODE   (VME_AM_STD_USR_DATA << DL401_ADDRMSH)
 
#define DL401_LWIOENA   0x8000 /* Long Word I/O ENAble */
 
#define DL401_IRQVEC   0x00ff /* Interrupt VECtor (R/W) */
 
#define DL401_IRQPRI   0x0700 /* Interrupt PRIority (R/W) */
 
#define DL401_IRQMOD   0x0800 /* Interrupt MODe (R/W) */
 
#define DL401_DEFMODE   0x0000 /* DEFault MODe (W) */
 
#define DL401_INTMODE   0x1000 /* INTernal MODe (W) */
 
#define DL401_EXTMODE   0xefff /* EXTernal MODe (W) */
 
#define DL401_INTGATE   0x2000 /* internal gate (W) */
 
#define DL401_EXTGATE   0xdfff /* external gate (W) */
 
#define DL401_DACWDIS   0x4000 /* DAC Write DISable (W) */
 
#define DL401_DACWENA   0xbfff /* DAC Write ENAble (W) */
 
#define DL401_AUTOMODE   0x8000 /* AUTOstop MODE enable (W) */
 
#define DL401_CONTMODE   0x7fff /* CONTinuous MODE enable (W) */
 
#define DL401_ASTOPACT   0x1000 /* :0 auto stop active */
 
#define DL401_INTREQ   0x2000 /* :1 internal interrupt request*/
 
#define DL401_RDAC   0x4000 /* Read serial DAQ output */
 
#define DL403_MAXMODULES   4
 
#define DL403_CYCLESNUM   3
 
#define DL403_CYCLE1   0x02
 
#define DL403_CYCLE2   0x04
 
#define DL403_CYCLE3   0x06
 
#define DL403_RATE   0x08
 
#define DL403_START   0x0a
 
#define DL403_STOP   0x0c
 
#define DL403_MODE   0x72
 
#define DL403_RESET   0x22
 
#define DL403_EXTERN   0x00
 
#define DL403_SELECTED   0x01
 
#define DL403_50MHZ   0x02
 
#define DL403_100MHZ   0x03
 
#define DL403_ASYNC   0x1000
 
#define DL403_CONT   0x2000
 
#define DL403_STEADY   0x4000
 
#define DL403_RUN   0x1000
 
#define DL403_RUNSHFT   12
 
#define DL403_GO   0xffff /* used for start/stop commands */
 

Functions

INT dl401_init (struct dl401 *d)
 
void dl401_teardown ()
 
INLINE void dl401_setup (struct dl401 *d, u_short bs, u_short am, u_short md)
 
INLINE int dl401_setPedestals (struct dl401 *d, u_short p[], int np)
 
INLINE u_long dl401_getPedestals (struct dl401 *d)
 
INLINE u_short dl401_getCounts (struct dl401 *d)
 
INLINE u_short dl401_getMode (struct dl401 *d)
 
INLINE u_short dl401_getMask (struct dl401 *d)
 
INLINE void dl401_clear (struct dl401 *d)
 
INLINE void dl401_reset (struct dl401 *d)
 
INLINE void dl401_convert (struct dl401 *d)
 
INLINE int dl401_finished (struct dl401 *d)
 
INLINE int dl401_read (struct dl401 *d, u_int *data)
 
INLINE int dl401_dmaread (struct dl401 *d, u_int *data)
 
INT dl403_init (struct dl403 *d)
 
void dl403_setClockRate (struct dl403 *d, u_short clk1, u_short clk2, u_short clk3)
 
void dl403_setClockCycle (struct dl403 *d, u_short cyc1, u_short cyc2, u_short cyc3)
 
INLINE void dl403_asyncMode (struct dl403 *d)
 
INLINE void dl403_contMode (struct dl403 *d)
 
INLINE void dl403_steadyMode (struct dl403 *d)
 
INLINE short dl403_runBit (struct dl403 *d)
 
INLINE void dl403_start (struct dl403 *d)
 
INLINE void dl403_stop (struct dl403 *d)
 
INLINE void dl403_reset (struct dl403 *d)
 
INLINE short dl403_running (struct dl403 *d)
 

Macro Definition Documentation

#define DL401_ADDRMOD   0x3f00 /* load ADDress MODifier */

Definition at line 74 of file dl40x.h.

#define DL401_ADDRMSH   8 /* ADDress Modifier SHift */

Definition at line 75 of file dl40x.h.

#define DL401_AM_EXT_MODE   (VME_AM_EXT_USR_DATA << DL401_ADDRMSH)

Definition at line 77 of file dl40x.h.

Referenced by dl401_bor1().

#define DL401_AM_STD_MODE   (VME_AM_STD_USR_DATA << DL401_ADDRMSH)

Definition at line 78 of file dl40x.h.

#define DL401_ASTOPACT   0x1000 /* :0 auto stop active */

Definition at line 96 of file dl40x.h.

#define DL401_AUTOMODE   0x8000 /* AUTOstop MODE enable (W) */

Definition at line 93 of file dl40x.h.

#define DL401_BASE   0x52 /* load BASE address (0x00) (W) */

Definition at line 66 of file dl40x.h.

Referenced by dl401_bor1().

#define DL401_CLIF   0x02 /* Clear Interrupt Flag (W) */

Definition at line 63 of file dl40x.h.

Referenced by dl401_clear().

#define DL401_CNTMASK   0x03FF

Definition at line 58 of file dl40x.h.

Referenced by dl401_getCounts().

#define DL401_CNTMAX   0x0400

Definition at line 59 of file dl40x.h.

Referenced by dl401_read(), and dl40x_read().

#define DL401_CONTMODE   0x7fff /* CONTinuous MODE enable (W) */

Definition at line 94 of file dl40x.h.

#define DL401_DACWDIS   0x4000 /* DAC Write DISable (W) */

Definition at line 91 of file dl40x.h.

Referenced by dl401_setPedestals().

#define DL401_DACWENA   0xbfff /* DAC Write ENAble (W) */

Definition at line 92 of file dl40x.h.

Referenced by dl401_setPedestals().

#define DL401_DEFMODE   0x0000 /* DEFault MODe (W) */

Definition at line 86 of file dl40x.h.

Referenced by dl401_bor1(), and dl401_setPedestals().

#define DL401_EXTGATE   0xdfff /* external gate (W) */

Definition at line 90 of file dl40x.h.

#define DL401_EXTMODE   0xefff /* EXTernal MODe (W) */

Definition at line 88 of file dl40x.h.

#define DL401_ICNV   0x02 /* Internal CoNVert (D0) (R) */

Definition at line 62 of file dl40x.h.

Referenced by dl401_convert().

#define DL401_INTGATE   0x2000 /* internal gate (W) */

Definition at line 89 of file dl40x.h.

#define DL401_INTMODE   0x1000 /* INTernal MODe (W) */

Definition at line 87 of file dl40x.h.

#define DL401_INTREQ   0x2000 /* :1 internal interrupt request*/

Definition at line 97 of file dl40x.h.

Referenced by dl401_finished().

#define DL401_IRQMOD   0x0800 /* Interrupt MODe (R/W) */

Definition at line 84 of file dl40x.h.

#define DL401_IRQPRI   0x0700 /* Interrupt PRIority (R/W) */

Definition at line 83 of file dl40x.h.

#define DL401_IRQVEC   0x00ff /* Interrupt VECtor (R/W) */

Definition at line 82 of file dl40x.h.

#define DL401_LWIOENA   0x8000 /* Long Word I/O ENAble */

Definition at line 79 of file dl40x.h.

Referenced by dl401_bor1().

#define DL401_MASK   0x62 /* MASK word (see below) (W) */

Definition at line 67 of file dl40x.h.

Referenced by dl401_bor1().

#define DL401_MAXMODULES   16

Definition at line 50 of file dl40x.h.

Referenced by dl40x_bor(), dl40x_eor(), and dl40x_read().

#define DL401_MODE   0x72 /* MODE word (see below) (R/W) */

Definition at line 68 of file dl40x.h.

Referenced by dl401_bor1(), dl401_finished(), dl401_getMode(), and dl401_setPedestals().

#define DL401_MRST   0x22 /* Module ReSeT (W) */

Definition at line 65 of file dl40x.h.

Referenced by dl401_reset().

#define DL401_NCHAN   4 /* number of inputs per module */

Definition at line 52 of file dl40x.h.

Referenced by dl401_bor1(), and dl401_setPedestals().

#define DL401_PEDBITMASK   0x00800000 /* pedestal bit mask */

Definition at line 55 of file dl40x.h.

#define DL401_PEDBITS   24

Definition at line 56 of file dl40x.h.

Referenced by dl401_setPedestals().

#define DL401_PEDCHANBITS   6

Definition at line 53 of file dl40x.h.

Referenced by dl401_setPedestals().

#define DL401_PEDCHANMASK   0x3F /* pedestal mask (one chan) */

Definition at line 54 of file dl40x.h.

Referenced by dl401_setPedestals().

#define DL401_PEDMASK   0x00FFFFFF /* pedestal mask */

Definition at line 57 of file dl40x.h.

Referenced by dl401_setPedestals().

#define DL401_RDAC   0x4000 /* Read serial DAQ output */

Definition at line 98 of file dl40x.h.

#define DL401_RMAD   0x90 /* Read Memory ADdres counter (R) */

Definition at line 69 of file dl40x.h.

Referenced by dl401_getCounts().

#define DL401_SMODSIZ   0x000f /* load SubMODule SIZe (==0) */

Definition at line 73 of file dl40x.h.

#define DL401_WDAC   0x12 /* Write serial DAC data (W) */

Definition at line 64 of file dl40x.h.

Referenced by dl401_setPedestals().

#define DL403_100MHZ   0x03

Definition at line 120 of file dl40x.h.

Referenced by dl403_init().

#define DL403_50MHZ   0x02

Definition at line 119 of file dl40x.h.

Referenced by dl403_init().

#define DL403_ASYNC   0x1000

Definition at line 123 of file dl40x.h.

Referenced by dl403_asyncMode().

#define DL403_CONT   0x2000

Definition at line 124 of file dl40x.h.

Referenced by dl403_contMode().

#define DL403_CYCLE1   0x02

Definition at line 107 of file dl40x.h.

Referenced by dl403_setClockCycle().

#define DL403_CYCLE2   0x04

Definition at line 108 of file dl40x.h.

Referenced by dl403_setClockCycle().

#define DL403_CYCLE3   0x06

Definition at line 109 of file dl40x.h.

Referenced by dl403_setClockCycle().

#define DL403_CYCLESNUM   3

Definition at line 104 of file dl40x.h.

#define DL403_EXTERN   0x00

Definition at line 117 of file dl40x.h.

#define DL403_GO   0xffff /* used for start/stop commands */

Definition at line 130 of file dl40x.h.

Referenced by dl403_reset(), dl403_start(), and dl403_stop().

#define DL403_MAXMODULES   4

Definition at line 103 of file dl40x.h.

#define DL403_MODE   0x72

Definition at line 113 of file dl40x.h.

Referenced by dl403_asyncMode(), dl403_contMode(), dl403_getMode(), dl403_runBit(), dl403_running(), and dl403_steadyMode().

#define DL403_RATE   0x08

Definition at line 110 of file dl40x.h.

Referenced by dl403_setClockRate().

#define DL403_RESET   0x22

Definition at line 114 of file dl40x.h.

Referenced by dl403_reset().

#define DL403_RUN   0x1000

Definition at line 127 of file dl40x.h.

Referenced by dl403_runBit(), and dl403_running().

#define DL403_RUNSHFT   12

Definition at line 128 of file dl40x.h.

#define DL403_SELECTED   0x01

Definition at line 118 of file dl40x.h.

Referenced by dl403_init().

#define DL403_START   0x0a

Definition at line 111 of file dl40x.h.

Referenced by dl403_start().

#define DL403_STEADY   0x4000

Definition at line 125 of file dl40x.h.

Referenced by dl403_steadyMode().

#define DL403_STOP   0x0c

Definition at line 112 of file dl40x.h.

Referenced by dl403_stop().

#define VME_AM_EXT_USR_DATA   0x09

Definition at line 76 of file dl40x.h.

Function Documentation

INLINE void dl401_clear ( struct dl401 *  d)

Definition at line 280 of file dl40x.cpp.

281 {
282  vme_write_d16 (d->a16_handle, d->a16_base | DL401_CLIF, 0xffff);
283 }
INLINE void dl401_convert ( struct dl401 *  d)

Definition at line 286 of file dl40x.cpp.

287 {
288  vme_read_d16 (d->a16_handle, d->a16_base | DL401_ICNV);
289 }
INLINE int dl401_dmaread ( struct dl401 *  d,
u_int *  data 
)
INLINE int dl401_finished ( struct dl401 *  d)

Definition at line 292 of file dl40x.cpp.

293 {
294  WORD mode = vme_read_d16 (d->a16_handle, d->a16_base | DL401_MODE);
295  return (mode & DL401_INTREQ);
296 }
INLINE u_short dl401_getCounts ( struct dl401 *  d)

Definition at line 261 of file dl40x.cpp.

262 {
263  WORD rmad = vme_read_d16 (d->a16_handle, d->a16_base | DL401_RMAD);
264  return rmad & DL401_CNTMASK;
265 }
INLINE u_short dl401_getMask ( struct dl401 *  d)
INLINE u_short dl401_getMode ( struct dl401 *  d)

Definition at line 268 of file dl40x.cpp.

269 {
270  return vme_read_d16 (d->a16_handle, d->a16_base | DL401_MODE);
271 }
INLINE u_long dl401_getPedestals ( struct dl401 *  d)
INT dl401_init ( struct dl401 *  d)
INLINE int dl401_read ( struct dl401 *  d,
u_int *  data 
)

Definition at line 300 of file dl40x.cpp.

301 {
302  register u_int i = 0;
303  register u_int *addr;
304  int counts;
305 
306  counts = dl401_getCounts (d);
307  diag_print (2, "dl401_read: [%d] base=%p counts=%d\n", d, addr, counts);
308 
309  while (i < DL401_CNTMAX - counts)
310  {
311  data[i++] = vme_read_d32 (d->a32_handle, d->a32_base + (i + counts)*4);
312  }
313 
314  i = 0;
315  while (i < counts)
316  {
317  data[DL401_CNTMAX - counts + i] =
318  vme_read_d32 (d->a32_handle, d->a32_base + i*4);
319  i++;
320  }
321  diag_print (2, "--> done\n");
322  return (DL401_CNTMAX);
323 }
INLINE void dl401_reset ( struct dl401 *  d)

Definition at line 274 of file dl40x.cpp.

275 {
276  vme_write_d16 (d->a16_handle, d->a16_base | DL401_MRST, 0xffff);
277 }
INLINE int dl401_setPedestals ( struct dl401 *  d,
u_short  p[],
int  np 
)

Definition at line 226 of file dl40x.cpp.

227 {
228  if (np != DL401_NCHAN)
229  return (-1);
230 
231  // compute word to write to pedestal DAC
232  DWORD parPed = 0;
233  for (int i = 0; i < np; i++) {
234  parPed |= (u_long) (p[i] & DL401_PEDCHANMASK) << (i * DL401_PEDCHANBITS);
235  }
236  parPed &= DL401_PEDMASK;
237  diag_print (2, "dl401_setPedestal: [%d] 0%08lo (", d, parPed);
238 
239  // enable writing to DAC
240  vme_write_d16 (d->a16_handle, d->a16_base | DL401_MODE,
241  DL401_DEFMODE & DL401_DACWENA);
242 
243  // shift bits into DAC one at a time; it's a serial interface
244  for (int i = 0; i < DL401_PEDBITS; i++)
245  {
246  u_short bit =
247  ((parPed << i) & DL401_PEDBITMASK) >> (DL401_PEDBITS - 1);
248  vme_write_d16 (d->a16_handle, d->a16_base | DL401_WDAC, bit & 0x0001);
249  diag_print (2, "%1x", bit);
250  }
251 
252  // disable writing to DAC
253  vme_write_d16 (d->a16_handle, d->a16_base | DL401_MODE,
254  DL401_DEFMODE | DL401_DACWDIS);
255  diag_print (2, ")\n");
256 
257  return SUCCESS;
258 }
INLINE void dl401_setup ( struct dl401 *  d,
u_short  bs,
u_short  am,
u_short  md 
)
void dl401_teardown ( )
INLINE void dl403_asyncMode ( struct dl403 *  d)

Definition at line 436 of file dl40x.cpp.

437 {
438  vme_write_d16 (d->vme_handle, d->a16_base | DL403_MODE, DL403_ASYNC);
439 }
INLINE void dl403_contMode ( struct dl403 *  d)

Definition at line 442 of file dl40x.cpp.

443 {
444  vme_write_d16 (d->vme_handle, d->a16_base | DL403_MODE, DL403_CONT);
445 }
INT dl403_init ( struct dl403 *  d)

Definition at line 352 of file dl40x.cpp.

353 {
354  // Do we have an FADC clock?
355  if (odb_find_key("/Equipment/Crate %d/Settings/FADC CLOCK", crate_number)) {
356  d->enabled = TRUE;
357  } else {
358  d->enabled = FALSE;
359  return SUCCESS;
360  }
361 
362  // find base address
363  d->a16_base =
364  odb_get_word ("/Equipment/Crate %d/Settings/FADC CLOCK/a16 base address",
365  crate_number);
366 
367  // Open a VME handle
368  struct vme_mapping_ctrl a16_mapping = {
369  VMEMAP_DWIDTH_32,
370  VMEMAP_ASPACE_A16,
371  VMEMAP_SUPUSERAM_SUPER,
372  VMEMAP_PRGDATAAM_DATA
373  };
374  d->vme_handle = vme_open(d->a16_base, a16_mapping, 0x100, 0);
375 
376  // Set DL403 clock frequency
377  INT fadc_frequency =
378  odb_get_int ("/Equipment/Crate %d/Settings/FADC CLOCK/frequency", crate_number);
379  switch (fadc_frequency)
380  {
381  case 100:
382  dl403_setClockRate (d, DL403_100MHZ, 0x0, 0x0);
383  break;
384  case 50:
385  dl403_setClockRate (d, DL403_50MHZ, 0x0, 0x0);
386  break;
387  case 25:
388  dl403_setClockRate (d, DL403_SELECTED, 0x0, 0x0);
389  break;
390 
391  default:
392  cm_msg (MERROR, frontend_name,
393  "FADC clock frequency must be 25, 50, or 100 MHz (currently %d)\n",
394  fadc_frequency);
395  dl403_setClockRate (d, DL403_50MHZ, 0x0, 0x0);
396  }
397 
398  dl403_setClockCycle (d, 0x800, 0x800, 0x800);
399  dl403_steadyMode (d);
400  dl403_start (d);
401 
402  diag_print (2, "dl403_init 0x%08lx\n", d->a16_base);
403  return SUCCESS;
404 }
INLINE void dl403_reset ( struct dl403 *  d)

Definition at line 466 of file dl40x.cpp.

467 {
468  vme_write_d16 (d->vme_handle, d->a16_base | DL403_RESET, DL403_GO);
469 }
INLINE short dl403_runBit ( struct dl403 *  d)

Definition at line 472 of file dl40x.cpp.

473 {
474  WORD mode = vme_read_d16 (d->vme_handle, d->a16_base | DL403_MODE);
475  return (mode & DL403_RUN);
476 }
INLINE short dl403_running ( struct dl403 *  d)

Definition at line 479 of file dl40x.cpp.

480 {
481  WORD mode = vme_read_d16 (d->vme_handle, d->a16_base | DL403_MODE);
482  return !(mode & DL403_RUN);
483 }
void dl403_setClockCycle ( struct dl403 *  d,
u_short  cyc1,
u_short  cyc2,
u_short  cyc3 
)

Definition at line 417 of file dl40x.cpp.

418 {
419  vme_write_d16 (d->vme_handle, d->a16_base | DL403_CYCLE1, c1);
420  vme_write_d16 (d->vme_handle, d->a16_base | DL403_CYCLE2, c2);
421  vme_write_d16 (d->vme_handle, d->a16_base | DL403_CYCLE3, c3);
422 
423  diag_print (2,
424  "dl403_setClockCycles: [%d] cyc1=0x%04hx cyc2=0x%04hx cyc3=0x%04hx\n",
425  d, c1, c2, c3);
426 
427 }
void dl403_setClockRate ( struct dl403 *  d,
u_short  clk1,
u_short  clk2,
u_short  clk3 
)

Definition at line 407 of file dl40x.cpp.

408 {
409  diag_print (2, "dl403_setClockRate: [%d] rate=0x%02hx\n", d,
410  (clk1 | (clk2 << 2) | (clk3 << 4)));
411 
412  vme_write_d16 (d->vme_handle, d->a16_base | DL403_RATE,
413  clk1 | (clk2 << 2) | (clk3 << 4));
414 }
INLINE void dl403_start ( struct dl403 *  d)

Definition at line 454 of file dl40x.cpp.

455 {
456  vme_write_d16 (d->vme_handle, d->a16_base | DL403_START, DL403_GO);
457 }
INLINE void dl403_steadyMode ( struct dl403 *  d)

Definition at line 448 of file dl40x.cpp.

449 {
450  vme_write_d16 (d->vme_handle, d->a16_base | DL403_MODE, DL403_STEADY);
451 }
INLINE void dl403_stop ( struct dl403 *  d)

Definition at line 460 of file dl40x.cpp.

461 {
462  vme_write_d16 (d->vme_handle, d->a16_base | DL403_STOP, DL403_GO);
463 }
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