AlcapDAQ  1
v1290.c
Go to the documentation of this file.
1 // ****************************************************************************
2 // * Filename: v1290.c
3 // * Description:
4 // * Created by: Nam Tran (nam at kuno-g.phys.sci.osaka-u.ac.jp)
5 // * Time tag: 2013-04-07 11:05:36
6 // ****************************************************************************
7 #include <stdio.h>
8 #include <string.h>
9 #include "bt617.h"
10 #include "v1290.h"
11 
12 uint16_t v1290_Read16(MVME_INTERFACE *mvme, uint32_t base, int offset)
13 {
14  int cmode;
15  mvme_get_dmode(mvme, &cmode);
16  mvme_set_am(mvme, V1290_AM);
17  mvme_set_dmode(mvme, V1290_REG_DW);
18  uint16_t data = mvme_read_value(mvme, base+offset);
19  mvme_set_dmode(mvme, cmode);
20 
21  return data;
22 }
23 
24 uint32_t v1290_Read32(MVME_INTERFACE *mvme, uint32_t base, int offset)
25 {
26  int cmode;
27  mvme_get_dmode(mvme, &cmode);
28  mvme_set_am(mvme, V1290_AM);
29  mvme_set_dmode(mvme, V1290_BUFF_DW);
30  uint32_t data = mvme_read_value(mvme, base+offset);
31 
32  mvme_set_dmode(mvme, cmode);
33  return data;
34 }
35 
36 void v1290_Write16(MVME_INTERFACE *mvme, uint32_t base, int offset, uint16_t value)
37 {
38  int cmode;
39  mvme_get_dmode(mvme, &cmode);
40  mvme_set_am(mvme, V1290_AM);
41  mvme_set_dmode(mvme, V1290_REG_DW);
42  mvme_write_value(mvme, base+offset, value);
43  mvme_set_dmode(mvme, cmode);
44 }
45 
46 /*****************************************************************/
47 int v1290_DataRead(MVME_INTERFACE *mvme, uint32_t base, uint32_t *pdest, int nentry)
48 {
49  int status;
50  mvme_set_am(mvme, V1290_AM);
51  mvme_set_dmode(mvme, V1290_BUFF_DW);
52  mvme_set_blt(mvme, MVME_BLT_BLT32);
53  status = mvme_read(mvme, pdest, base, sizeof(uint32_t) * nentry);
54  mvme_set_blt(mvme, MVME_BLT_NONE);
55  return nentry;
56  /*
57  for (i=0 ; i<nentry ; i++) {
58  if (!v1190_DataReady(mvme, base))
59  break;
60  pdest[i] = mvme_read_value(mvme, base);
61  }
62  mvme_set_dmode(mvme, cmode);
63  return i;
64  */
65 }
66 
67 /*****************************************************************/
68 int v1290_MicroWrite(MVME_INTERFACE *mvme, uint32_t base, uint16_t data)
69 {
70  int i;
71 
72  mvme_set_am(mvme, V1290_AM);
73  mvme_set_dmode(mvme, V1290_REG_DW);
74  for (i=0; i<1000; i++)
75  {
76  uint16_t microHS = mvme_read_value(mvme, base+V1290_MICRO_HND);
77  if (microHS & V1290_MICRO_WR_OK) {
78  mvme_write_value(mvme, base+V1290_MICRO, data);
79  return 1;
80  }
81  usleep(1);
82  }
83  printf("v1290_MicroWrite: Micro not ready for writing!\n");
84  return -1;
85 }
86 
87 int v1290_MicroRead(MVME_INTERFACE *mvme, const uint32_t base)
88 {
89  int i;
90  int reg=-1;
91  mvme_set_am(mvme, V1290_AM);
92  mvme_set_dmode(mvme, V1290_REG_DW);
93 
94  for (i=100; i>0; i--) {
95  uint16_t microHS = mvme_read_value(mvme, base+V1290_MICRO_HND);
96  if (microHS & V1290_MICRO_RD_OK) {
97  reg = mvme_read_value(mvme, base+V1290_MICRO);
98 // printf("i:%d microHS:%d %x\n", i, microHS, reg);
99  return (reg);
100  }
101  usleep(1);
102  };
103  return -1;
104 }
105 
106 uint16_t v1290_ReadMicro(MVME_INTERFACE *mvme, const uint32_t base,
107  uint16_t opcode)
108 {
109  int cmode, value;
110  mvme_get_dmode(mvme, &cmode);
111  mvme_set_dmode(mvme, MVME_DMODE_D16);
112  value = v1290_MicroWrite(mvme, base, opcode);
113  value = v1290_MicroRead(mvme, base);
114  mvme_set_dmode(mvme, cmode);
115  return (uint16_t) value;
116 }
117 
118 void v1290_WriteMicro(MVME_INTERFACE *mvme, uint32_t base,
119  uint16_t opcode, uint16_t data)
120 {
121  int cmode, value;
122  mvme_get_dmode(mvme, &cmode);
123  mvme_set_dmode(mvme, MVME_DMODE_D16);
124  value = v1290_MicroWrite(mvme, base, opcode);
125  value = v1290_MicroWrite(mvme, base, data);
126  mvme_set_dmode(mvme, cmode);
127 }
128 /*****************************************************************/
129 
130 void v1290_TriggerMatchingSet(MVME_INTERFACE *mvme, uint32_t base)
131 {
132  int cmode, value;
133  mvme_get_dmode(mvme, &cmode);
134  mvme_set_dmode(mvme, MVME_DMODE_D16);
135  value = v1290_MicroWrite(mvme, base, V1290_TRG_MATCH_OPCODE);
136  mvme_set_dmode(mvme, cmode);
137 }
138 
139 void v1290_ContinuousSet(MVME_INTERFACE *mvme, uint32_t base)
140 {
141  int cmode, value;
142  mvme_get_dmode(mvme, &cmode);
143  mvme_set_dmode(mvme, MVME_DMODE_D16);
144  value = v1290_MicroWrite(mvme, base, V1290_CONT_STORE_OPCODE);
145  mvme_set_dmode(mvme, cmode);
146 }
147 
148 int v1290_AcqModeRead(MVME_INTERFACE *mvme, uint32_t base)
149 {
150  int cmode, value;
151  mvme_get_dmode(mvme, &cmode);
152  mvme_set_dmode(mvme, MVME_DMODE_D16);
153  value = v1290_MicroWrite(mvme, base, V1290_READ_ACQ_MOD_OPCODE);
154  value = v1290_MicroRead(mvme, base);
155  printf("AcqMode (0 - cont., 1 - trigger matching): %X\n",value&0x1);
156  mvme_set_dmode(mvme, cmode);
157  return (value & 0x1);
158 }
159 
160 int v1290_TriggerConfRead(MVME_INTERFACE *mvme, uint32_t base, uint16_t *conf)
161 {
162  int cmode, value;
163  mvme_get_dmode(mvme, &cmode);
164  mvme_set_dmode(mvme, MVME_DMODE_D16);
165  value = v1290_MicroWrite(mvme, base, V1290_READ_TRG_CONF_OPCODE);
166  for (int i = 0; i < 5; ++i)
167  {
168  value = v1290_MicroRead(mvme, base);
169  printf("%x\n", (uint16_t)value);
170  *conf++ = (uint16_t)value;
171  }
172 
173  mvme_set_dmode(mvme, cmode);
174  return 0;
175 }
176 
177 void v1290_SetWindowWidth(MVME_INTERFACE *mvme, uint32_t base, uint16_t width)
178 {
179  v1290_WriteMicro(mvme, base, V1290_SET_WIN_WIDTH_OPCODE, width/25);
180 }
181 
182 void v1290_SetWindowOffset(MVME_INTERFACE *mvme, uint32_t base, int16_t offset)
183 {
184  uint16_t tmp = abs(offset/25);
185  if (offset>0)
186  tmp += 0xf000;
187  else
188  tmp += 0xf800;
189  v1290_WriteMicro(mvme, base, V1290_SET_WIN_OFFSET_OPCODE, tmp);
190 }
191 
192 void v1290_SetExtraMargin(MVME_INTERFACE *mvme, uint32_t base, uint16_t margin)
193 {
194  v1290_WriteMicro(mvme, base, V1290_SET_SW_MARGIN_OPCODE, margin);
195 }
196 
197 void v1290_SetRejectMargin(MVME_INTERFACE *mvme, uint32_t base, uint16_t margin)
198 {
199  v1290_WriteMicro(mvme, base, V1290_SET_REJ_MARGIN_OPCODE, margin);
200 }
201 
202 void v1290_EnableTriggerSubtraction(MVME_INTERFACE *mvme, uint32_t base, bool en)
203 {
204  int cmode, value;
205  mvme_get_dmode(mvme, &cmode);
206  mvme_set_dmode(mvme, MVME_DMODE_D16);
207  uint32_t opcode;
208  if (en)
209  opcode = V1290_EN_SUB_TRG_OPCODE;
210  else
211  opcode = V1290_DIS_SUB_TRG_OPCODE;
212 
213  value = v1290_MicroWrite(mvme, base, opcode);
214  mvme_set_dmode(mvme, cmode);
215 }
216 
217 // TDC edge and resolution
218 void v1290_SetEdgeDetection(MVME_INTERFACE *mvme, uint32_t base, uint16_t edge)
219 {
220  v1290_WriteMicro(mvme, base, V1290_SET_DETECTION_OPCODE, edge);
221 }
222 
223 void v1290_SetEdgeResolution(MVME_INTERFACE *mvme, uint32_t base, uint16_t res)
224 {
225  v1290_WriteMicro(mvme, base, V1290_SET_TR_LEAD_LSB_OPCODE, res);
226 }
227 
228 uint16_t v1290_ReadEdgeResolution(MVME_INTERFACE *mvme, uint32_t base)
229 {
230  return v1290_ReadMicro(mvme, base, V1290_READ_RES_OPCODE);
231 }
232 
233 uint16_t v1290_ReadEdgeDetection(MVME_INTERFACE *mvme, uint32_t base)
234 {
235  return v1290_ReadMicro(mvme, base, V1290_READ_DEAD_TIME_OPCODE);
236 }
237 
238 void v1290_SetDeadtime(MVME_INTERFACE *mvme, uint32_t base, uint16_t deadtime)
239 {
240  v1290_WriteMicro(mvme, base, V1290_SET_DEAD_TIME_OPCODE, deadtime);
241 }
242 
243 uint16_t v1290_ReadDeadtime(MVME_INTERFACE *mvme, uint32_t base)
244 {
245  return v1290_ReadMicro(mvme, base, V1290_READ_DEAD_TIME_OPCODE);
246 }
247 
248 //TDC read out
249 void v1290_EnableHeader(MVME_INTERFACE *mvme, uint32_t base, bool en)
250 {
251  int cmode, value;
252  mvme_get_dmode(mvme, &cmode);
253  mvme_set_dmode(mvme, MVME_DMODE_D16);
254  uint32_t opcode;
255  if (en)
256  opcode = V1290_EN_HEAD_TRAILER_OPCODE;
257  else
258  opcode = V1290_DIS_HEAD_TRAILER_OPCODE;
259 
260  value = v1290_MicroWrite(mvme, base, opcode);
261  mvme_set_dmode(mvme, cmode);
262 }
263 
264 bool v1290_HeaderIsEnabled(MVME_INTERFACE *mvme, uint32_t base)
265 {
266  return (v1290_ReadMicro(mvme, base, V1290_READ_HEAD_TRAILER_OPCODE) & 0x1);
267 }
268 
269 void v1290_SetMaxHits(MVME_INTERFACE *mvme, uint32_t base, uint16_t max)
270 {
271  v1290_WriteMicro(mvme, base, V1290_SET_EVENT_SIZE_OPCODE,max);
272 }
273 
274 uint16_t v1290_ReadMaxHits(MVME_INTERFACE *mvme, uint32_t base)
275 {
276  return (v1290_ReadMicro(mvme, base, V1290_READ_EVENT_SIZE_OPCODE) &0xf);
277 }
278 
279 void v1290_EnableTDCErrorMark(MVME_INTERFACE *mvme, uint32_t base, bool en)
280 {
281  int cmode, value;
282  mvme_get_dmode(mvme, &cmode);
283  mvme_set_dmode(mvme, MVME_DMODE_D16);
284  uint32_t opcode;
285  if (en)
286  opcode = V1290_EN_ERROR_MARK_OPCODE;
287  else
288  opcode = V1290_DIS_ERROR_MARK_OPCODE;
289 
290  value = v1290_MicroWrite(mvme, base, opcode);
291  mvme_set_dmode(mvme, cmode);
292 }
293 
294 void v1290_EnableBypassTDC(MVME_INTERFACE *mvme, uint32_t base, bool en)
295 {
296  int cmode, value;
297  mvme_get_dmode(mvme, &cmode);
298  mvme_set_dmode(mvme, MVME_DMODE_D16);
299  uint32_t opcode;
300  if (en)
301  opcode = V1290_EN_ERROR_BYPASS_OPCODE;
302  else
303  opcode = V1290_DIS_ERROR_BYPASS_OPCODE;
304 
305  value = v1290_MicroWrite(mvme, base, opcode);
306  mvme_set_dmode(mvme, cmode);
307 }
308 
309 void v1290_SetFIFOSize(MVME_INTERFACE *mvme, uint32_t base, uint16_t size)
310 {
311  v1290_WriteMicro(mvme, base, V1290_SET_FIFO_SIZE_OPCODE,size);
312 }
313 
314 uint16_t v1290_ReadFIFOSize(MVME_INTERFACE *mvme, uint32_t base)
315 {
316  return (v1290_ReadMicro(mvme, base, V1290_READ_FIFO_SIZE_OPCODE) &0x7);
317 }
318 // Channel Enable
319 void v1290_EnableChannel(MVME_INTERFACE *mvme, uint32_t base,uint16_t chn,bool en)
320 {
321  int cmode, value;
322  mvme_get_dmode(mvme, &cmode);
323  mvme_set_dmode(mvme, MVME_DMODE_D16);
324  uint32_t opcode;
325  if (en)
326  opcode = V1290_EN_CHANNEL_OPCODE;
327  else
328  opcode = V1290_DIS_CHANNEL_OPCODE;
329 
330  en += chn;
331  value = v1290_MicroWrite(mvme, base, opcode);
332  mvme_set_dmode(mvme, cmode);
333 }
334 
335 void v1290_EnableAllChannels(MVME_INTERFACE *mvme, uint32_t base)
336 {
337  int cmode, value;
338  mvme_get_dmode(mvme, &cmode);
339  mvme_set_dmode(mvme, MVME_DMODE_D16);
340  value = v1290_MicroWrite(mvme, base, V1290_EN_ALL_CH_OPCODE);
341  mvme_set_dmode(mvme, cmode);
342 }
343 
344 void v1290_DisableAllChannels(MVME_INTERFACE *mvme, uint32_t base)
345 {
346  int cmode, value;
347  mvme_get_dmode(mvme, &cmode);
348  mvme_set_dmode(mvme, MVME_DMODE_D16);
349  value = v1290_MicroWrite(mvme, base, V1290_DIS_ALL_CH_OPCODE);
350  printf("value: %d\n", value);
351  mvme_set_dmode(mvme, cmode);
352 }
353 
354 void v1290_WriteEnablePattern(MVME_INTERFACE *mvme,uint32_t base,uint16_t pattern)
355 {
356  v1290_WriteMicro(mvme, base, V1290_WRITE_EN_PATTERN_OPCODE, pattern);
357 }
358 
359 uint16_t v1290_ReadEnablePattern(MVME_INTERFACE *mvme,uint32_t base)
360 {
361  return (v1290_ReadMicro(mvme,base,V1290_READ_EN_PATTERN_OPCODE));
362 }
363 
364 // Regiters
365 void v1290_ReadControlRegister(MVME_INTERFACE *mvme, uint32_t base)
366 {
367  uint16_t reg = v1290_Read16(mvme, base, V1290_CONTROL);
368  printf("Control register: 0x%X\n", V1290_CONTROL);
369  printf(" - Bus error enable: %d\n", reg & 0x1);
370  printf(" - Empty event enable: %d\n", (reg & (0x1<<3))>>3);
371  printf(" - Compensation enable: %d\n", (reg & (0x1<<5))>>5);
372  printf(" - Event FIFO enable: %d\n", (reg & (0x1<<8))>>8);
373  /*showbits(reg);*/
374 }
375 
376 void v1290_EnableBusError(MVME_INTERFACE *mvme, uint32_t base, bool en)
377 {
378  uint16_t reg = v1290_Read16(mvme, base, V1290_CONTROL);
379  if (en)
380  v1290_Write16(mvme, base, V1290_CONTROL, reg + 0x1);
381  else
382  v1290_Write16(mvme, base, V1290_CONTROL, reg & 0xfffe);
383 }
384 
385 void v1290_EnableEmptyEvent(MVME_INTERFACE *mvme, uint32_t base, bool en)
386 {
387  uint16_t reg = v1290_Read16(mvme, base, V1290_CONTROL);
388  if (en)
389  v1290_Write16(mvme, base, V1290_CONTROL, reg + (0x1<<3));
390  else
391  v1290_Write16(mvme, base, V1290_CONTROL, reg & (0xfff7));
392 }
393 
394 void v1290_EnableEventFIFO(MVME_INTERFACE *mvme, uint32_t base, bool en)
395 {
396  uint16_t reg = v1290_Read16(mvme, base, V1290_CONTROL);
397  if (en)
398  v1290_Write16(mvme, base, V1290_CONTROL, reg + 0x100);
399  else
400  v1290_Write16(mvme, base, V1290_CONTROL, reg & 0xfeff);
401 }
402 
403 void v1290_ReadStatusRegister(MVME_INTERFACE *mvme, uint32_t base)
404 {
405  uint16_t reg = v1290_Read16(mvme, base, V1290_STATUS);
406  printf("Status register: 0x%X\n", V1290_STATUS);
407  printf(" - Data ready: %d\n", reg & 0x1);
408  printf(" - Almost full: %d\n", (reg & (0x1<<1))>>1);
409  printf(" - Full: %d\n", (reg & (0x1<<2))>>2);
410  printf(" - Trigger match: %d\n", (reg & (0x1<<3))>>3);
411  printf(" - Header enable: %d\n", (reg & (0x1<<4))>>4);
412  printf(" - Term on: %d\n", (reg & (0x1<<5))>>5);
413  printf(" - Error TDC0: %d\n", (reg & (0x1<<6))>>6);
414  printf(" - Error TDC1: %d\n", (reg & (0x1<<7))>>7);
415  printf(" - Error TDC2: %d\n", (reg & (0x1<<8))>>8);
416  printf(" - Error TDC3: %d\n", (reg & (0x1<<9))>>9);
417  printf(" - Bus error: %d\n", (reg & (0x1<<10))>>10);
418  printf(" - Purged: %d\n", (reg & (0x1<<11))>>11);
419  printf(" - Res 0: %d\n", (reg & (0x1<<12))>>12);
420  printf(" - Res 1: %d\n", (reg & (0x1<<13))>>13);
421  printf(" - Pair: %d\n", (reg & (0x1<<14))>>14);
422  printf(" - Trigger lost: %d\n", (reg & (0x1<<15))>>15);
423 }
424 
425 bool v1290_IsDataReady(MVME_INTERFACE *mvme, uint32_t base)
426 {
427  uint16_t reg = v1290_Read16(mvme, base, V1290_STATUS);
428  return ((reg & (0x1)));
429 }
430 
431 bool v1290_IsAlmostFull(MVME_INTERFACE *mvme, uint32_t base)
432 {
433  uint16_t reg = v1290_Read16(mvme, base, V1290_STATUS);
434  return (reg & (0x1<<1))>>1;
435 }
436 
437 bool v1290_IsFull(MVME_INTERFACE *mvme, uint32_t base)
438 {
439  uint16_t reg = v1290_Read16(mvme, base, V1290_STATUS);
440  return (reg & (0x1<<2))>>2;
441 }
442 
443 void v1290_ModuleReset(MVME_INTERFACE *mvme, uint32_t base)
444 {
445  v1290_Write16(mvme,base, V1290_MOD_RESET,0x1);
446 }
447 
448 void v1290_SoftClear(MVME_INTERFACE *mvme, uint32_t base)
449 {
450  v1290_Write16(mvme,base , V1290_SW_CLEAR,0x1);
451 }
452 
453 void v1290_EventReset(MVME_INTERFACE *mvme, uint32_t base)
454 {
455  v1290_Write16(mvme,base, V1290_SW_EVENT_RESET,0x1);
456 }
457 
458 void v1290_SoftTrigger(MVME_INTERFACE *mvme, uint32_t base)
459 {
460  v1290_Write16(mvme, base, V1290_SW_TRIGGER, 0x1);
461 }
462 
463 uint32_t v1290_ReadEventCounter(MVME_INTERFACE *mvme, uint32_t base)
464 {
465  return v1290_Read32(mvme, base, V1290_EVENT_COUNTER);
466 }
467 
468 uint16_t v1290_ReadEventStored(MVME_INTERFACE *mvme, uint32_t base)
469 {
470  return v1290_Read16(mvme, base, V1290_EVENT_STORED);
471 }
472 
473 void v1290_SetAlmostFullLevel(MVME_INTERFACE *mvme, uint32_t base,
474  uint16_t level)
475 {
476  v1290_Write16(mvme, base, V1290_ALMOST_FULL_LVL, level);
477 }
478 
479 uint16_t v1290_ReadAlmostFullLevel(MVME_INTERFACE *mvme,
480  uint32_t base, uint16_t level)
481 {
482  return v1290_Read16(mvme, base, V1290_ALMOST_FULL_LVL);
483 }
484 
485 void v1290_FWRev(MVME_INTERFACE *mvme, uint32_t base)
486 {
487  unsigned short int reg = v1290_Read16(mvme,base, V1290_FW_REV);
488  showbits(reg);
489 }
490 
491 void v1290_ReadEventFIFO(MVME_INTERFACE *mvme, uint32_t base, uint16_t *dest)
492 {
493  uint32_t reg = v1290_Read32(mvme, base, V1290_EVENT_FIFO);
494  showbits(reg);
495  dest[0] = reg&0xffff0000;
496  dest[1] = reg&0xffff;
497 }
498 
499 uint16_t v1290_ReadEventFIFOStatus(MVME_INTERFACE *mvme, uint32_t base)
500 {
501  return (v1290_Read16(mvme, base, V1290_EVENT_FIFO_STATUS)&0x3);
502 }
503 
504 /*#define TEST_V1290*/
505 #ifdef TEST_V1290
506 
507 #define V1290N_BASE 0x20000000
508 #define RPV130_BASE 0x8000
509 #include "rpv130.h"
510 void v1290_SetupTrigger(MVME_INTERFACE *myvme);
511 void v1290_SetupTDC(MVME_INTERFACE *myvme);
512 void v1290_SetupReadout(MVME_INTERFACE *myvme);
516 void v1290_ContinuousRead(MVME_INTERFACE *myvme);
519 void v1290_TriggerMatchingRead(MVME_INTERFACE *myvme);
520 int main()
521 {
522  printf("Test program for V1290\n");
523  MVME_INTERFACE *myvme;
524  mvme_open(&myvme, 0);
525 
526  v1290_ContinuousRead(myvme);
527  // Finish
528  mvme_close(myvme);
529  return 0;
530 }
531 
532 void v1290_SetupTrigger(MVME_INTERFACE *myvme)
533 {
534  printf("Trigger matching set ...\n");
535  v1290_TriggerMatchingSet(myvme, V1290N_BASE);
536  sleep(1);
537  v1290_SetWindowWidth(myvme, V1290N_BASE, 40000);
538  sleep(1);
539  v1290_SetWindowOffset(myvme, V1290N_BASE, -10000);
540  sleep(1);
541  v1290_SetExtraMargin(myvme, V1290N_BASE, 0x9);
542  sleep(1);
543  v1290_SetRejectMargin(myvme, V1290N_BASE, 0x8);
544  sleep(1);
545  v1290_EnableTriggerSubtraction(myvme, V1290N_BASE, true);
546  sleep(1);
547  v1290_AcqModeRead(myvme, V1290N_BASE);
548  sleep(1);
549  uint16_t trg_conf[5];
550  v1290_TriggerConfRead(myvme, V1290N_BASE, trg_conf);
551 }
552 void v1290_SetupTDC(MVME_INTERFACE *myvme)
553 {
554  printf("Setting TDC ...\n");
555  v1290_SetEdgeDetection(myvme, V1290N_BASE, 0x1);
556  sleep(1);
557  v1290_SetEdgeResolution(myvme, V1290N_BASE, 0x1);
558  sleep(1);
559  printf("Edge: %d\n",v1290_ReadEdgeDetection(myvme, V1290N_BASE) );
560  sleep(1);
561  printf("Res: %d\n",v1290_ReadEdgeResolution(myvme, V1290N_BASE) );
562  sleep(2);
563  v1290_SetDeadtime(myvme, V1290N_BASE, 0x2);
564  sleep(1);
565  printf("Deadtime: %d\n",v1290_ReadDeadtime(myvme, V1290N_BASE) );
566  sleep(1);
567 }
568 void v1290_SetupReadout(MVME_INTERFACE *myvme)
569 {
570  v1290_EnableHeader(myvme, V1290N_BASE, false);
571  sleep(1);
572  printf("header enable %d\n", v1290_HeaderIsEnabled(myvme, V1290N_BASE));
573  sleep(1);
574  printf("max hits %d\n", v1290_ReadMaxHits(myvme, V1290N_BASE));
575  sleep(1);
576  v1290_SetFIFOSize(myvme, V1290N_BASE, 0x6);
577  sleep(1);
578  printf("fifo size %d\n", v1290_ReadFIFOSize(myvme, V1290N_BASE));
579  sleep(1);
580  v1290_DisableAllChannels(myvme, V1290N_BASE);
581  sleep(1);
582  v1290_WriteEnablePattern(myvme, V1290N_BASE, 0x5);
583  sleep(1);
584  v1290_EnableChannel(myvme, V1290N_BASE, 0x0, false);
585  sleep(1);
586  printf("enable pattern %x\n", v1290_ReadEnablePattern(myvme, V1290N_BASE));
587  v1290_EnableChannel(myvme, V1290N_BASE, 0, true);
588 }
589 
590 void v1290_ContinuousRead(MVME_INTERFACE *myvme)
591 {
592  // Set up TDC in Continuous Storage mode
593  /*v1290_ModuleReset(myvme, V1290N_BASE);*/
594  /*sleep(1);*/
595  uint16_t almost_full_level = 8;
596  v1290_ContinuousSet(myvme, V1290N_BASE);
597  sleep(1);
598  v1290_SetAlmostFullLevel(myvme, V1290N_BASE, almost_full_level);
599  sleep(1);
600  v1290_AcqModeRead(myvme, V1290N_BASE);
601  printf("v1290DataReady: %d\n",v1290_IsDataReady(myvme, V1290N_BASE));
602  printf("v1290AlmostFull: %d\n",v1290_IsAlmostFull(myvme, V1290N_BASE));
603 
604  // Injecting hits
605  int i = 0;
606  printf("injecting trigger and signals ... \n");
607  do
608  {
609  printf("round %d ...\n", i + 1);
610  rpv130_Pulse(myvme,RPV130_BASE,1); // input 11
611  rpv130_Pulse(myvme,RPV130_BASE,3); // input 15
612  i++;
613  }
614  while (!v1290_IsAlmostFull(myvme, V1290N_BASE));
615 
616  printf("v1290DataReady: %d\n",v1290_IsDataReady(myvme, V1290N_BASE));
617  printf("v1290AlmostFull: %d\n",v1290_IsAlmostFull(myvme, V1290N_BASE));
618 
619  // readout
620  unsigned int buff[200];
621  for (i=0; i<200; i++)
622  buff[i] = 0;
623 
624  // Sequential read out
625  /*for (i=0; i<20; i++)*/
626  /*buff[i] = v1290_Read32(myvme,V1290N_BASE,V1290_OUT_BUFFER);*/
627 
628  // BLT read out
629  int nentry;
630  nentry = v1290_DataRead(myvme, V1290N_BASE, buff, almost_full_level + 4);
631 
632  // Check read data
633  for (i = 0; i < nentry; i++) {
634  /*if(V1290_IS_TDC_MEASURE(buff[i]))*/
635  /*{*/
636  printf("buff[%02d], ch %02d:",i,V1290_GET_TDC_MSR_CHANNEL(buff[i]));
637  printf(", value: %d, ", V1290_GET_TDC_MSR_MEASURE(buff[i]));
638  showbits(buff[i]);
639  /*}*/
640  }
641 }
642 
643 void v1290_TriggerMatchingRead(MVME_INTERFACE *myvme)
644 {
645  /*v1290_ModuleReset(myvme, V1290N_BASE);*/
646  sleep(1);
647  v1290_AcqModeRead(myvme, V1290N_BASE);
648  /*v1290_SetupTrigger(myvme);*/
649  /*v1290_SetupTDC(myvme);*/
650  /*sleep(1);*/
651  /*v1290_SetupReadout(myvme);*/
652  /*v1290_EnableBusError(myvme, V1290N_BASE, true);*/
653  /*v1290_EnableEventFIFO(myvme, V1290N_BASE, true);*/
654  /*v1290_EnableEmptyEvent(myvme, V1290N_BASE, true);*/
655  /*v1290_ReadControlRegister(myvme, V1290N_BASE);*/
656 
657 #if 1
658  printf("v1290DataReady: %d\n",v1290_IsDataReady(myvme, V1290N_BASE));
659  uint16_t fifo[2];
660  v1290_ReadEventFIFO(myvme, V1290N_BASE, fifo);
661  printf("event cnt: %d, word cnt: %d\n", fifo[0],fifo[1]);
662  usleep(1);
663 
664  printf("injecting trigger and signals ... ");
665  rpv130_Pulse(myvme,RPV130_BASE,1); // input 11
666  rpv130_Pulse(myvme,RPV130_BASE,3); // input 15
667  usleep(1);
668  printf("v1290DataReady: %d\n",v1290_IsDataReady(myvme, V1290N_BASE));
669 
670  printf("FIFO stat %d\n", v1290_ReadEventFIFOStatus(myvme, V1290N_BASE));
671  v1290_ReadEventFIFO(myvme, V1290N_BASE, fifo);
672  printf("event cnt: %d, word cnt: %d\n", fifo[0],fifo[1]);
673  printf("event stored: %d\n", v1290_ReadEventStored(myvme, V1290N_BASE));
674 
675  // readout
676  unsigned int buff[200];
677  int i;
678  for (i=0; i<200; i++)
679  buff[i] = 0;
680 
681  /*for (i=0; i<20; i++)*/
682  /*buff[i] = v1290_Read32(myvme,V1290N_BASE,V1290_OUT_BUFFER);*/
683  v1290_DataRead(myvme, V1290N_BASE, buff, fifo[1]);
684 
685  for (i = 0; i < 10; i++) {
686  if(V1290_IS_TDC_MEASURE(buff[i]))
687  {
688  printf("buff[%02d], ch %02d:",i,V1290_GET_TDC_MSR_CHANNEL(buff[i]));
689  printf(", value: %d, ", V1290_GET_TDC_MSR_MEASURE(buff[i]));
690  showbits(buff[i]);
691  }
692  }
693  printf("v1290DataReady: %d\n",v1290_IsDataReady(myvme, V1290N_BASE));
694 #endif
695 }
696 #endif
Generated by   doxygen 1.8.4